1. Technical Field
The present invention relates to a semiconductor memory device and a method of controlling a semiconductor memory device, and in particular to a semiconductor memory device which contains anti-fuse elements, and a method of controlling such semiconductor memory device.
2. Background Art
In these years, anti-fuse memory making use of anti-fuse elements typically composed of transistors and so forth has been known. Write-in operation (programming) into the anti-fuse memory is accomplished by causing breakdown of a gate insulating film in each anti-fuse element, to thereby electrically connect a gate electrode and an impurity-diffused region formed in a surficial portion of a substrate.
It has, however, been difficult to exactly judge a program status of the anti-fuse element, due to variation in the processes and variation in current after breakdown of the anti-fuse element.
Japanese Laid-Open Patent Publication No. 2007-080302 describes a semiconductor integrated circuit which includes a first and second anti-fuse elements commonly connected at one ends thereof with each other; a first and second transistors for program selection, which are connected to the other ends of the first and second anti-fuse elements; a switching element connected between one ends of the first and second transistor for program selection; and a sense amplifier circuit connected at one end to the switching element, so as to detect data read out from the first and second anti-fuse elements. By virtue of this configuration, two anti-fuse elements concomitantly operate during readout, so that a sufficient level of readout current may be ensured if both of the anti-fuse elements are broken down. According to the description, the breakdown/non-breakdown status may consequently be judged in a stable manner, without being affected by variation in the current due to variations in the process or variations in current after the anti-fuse elements are broken down.